This invention relates generally to an arithmetic logic unit (ALU), and more particularly, to an arithmetic logic unit utilizing strobed gates.
Arithmetic logic units for performing both arithmetic and logical functions are well known. Such devices, however, are usually comprised of complex random logic which presents, in the case of an integrated circuit, certain layout difficulties which in turn results in the occupation of a significant amount of silicon area. Therefore, a need exists for an ALU which occupies less area without sacrificing functionality or versatility.